Paul Liu Email: [contact removed] | Phone: [contact removed] | [contact removed]
3 years experience
NPI Test Engineer with hands-on experience in high-speed silicon bring-up including NVLink and PCIe, physical layer validation, and characterization across NVIDIA's Rubin, Blackwell, Tegra, and GB20X programs. Experience in board-level hardware debugging, Vmin characterization, and yield-focused issue analysis. Adept at developing Perl/Python automation in Unix environments.
Skills
Experience
NPI Test Engineer — NVIDIA
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Performed comprehensive Vmin analysis and frequency characterization using Shmoo plots for extreme high-speed IOs, including NVLink up to 345Gbps and PCIe Gen6. Extracted critical signal integrity metrics, including EOM and BER, to define stable operating margins and resolve hardware-sensitive BiDir anomalies. Conducted component-level troubleshooting on complex test loadboards using schematic tracing, oscilloscopes, and ATE-related platforms to isolate I2C relay and hardware anomalies. Drove yield improvement and process-related issue resolution in production-facing environments by collaborating with Foundry, PDE, and DFT teams to improve screening effectiveness and product readiness. Served as Taiwan FT lead for Rubin and Blackwell, driving test execution, cross-team coordination, and the NPI-to-HVM transition. Developed Perl and Python automation scripts in Unix/Linux to streamline data organization, debug support, and workflow efficiency on Advantest 93K.
Software Development Intern — TSMC
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Developed a learning app using Flutter, reducing onboarding time. Collaborated with a UI/UX team for app development.
Featured projects
A Near-Optimal Energy Management Mechanism Considering QoS and Fairness Requirements in Tree Structure Wireless Sensor Networks
Published research paper in MDPI Sensors, Volume 23, Issue 2.
Education
Taiwan Tech — B.S., Information Management
National Taiwan University — M.S., Information Management
Kaunas University of Technology — Exchange Program
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